Department of Electrical Engineering
Cadence University Program Member
This page provides information only about the Cadence software used at our university.
Introduction to Virtuoso Schematic Editor and Analog Environment
ACM Parameter Extraction from Simulations
Cadence custom IC tools are being used primarily in the following courses:
EELE 5131 Microelectronics: (graduate) Cadence tools are used for assignments and for the class project.
EELE 5331 Digital ASIC Design: (graduate) Cadence tools are used for tutorials and the class project.
EELE 0531 Analog CMOS Integrated Circuits: (undergraduate) Cadence tools are used for tutorials and the class project.
EELE 5433: Design of RF ICs: (graduate) Cadence tools are used for assignments and for the class project.
Cadence custom IC tools are also used in projects:
Bowei Yao: “Picowatt, 0.6V Self-biased Subthreshold CMOS voltage reference,” MSc paper project, Winter 2018.
ShashiVardhanReddy Samidi: “A CMOS High Voltage DC-DC Up Converter Dedicated for Ultrasonic Applications”, MSc paper project, Winter 2018.
SagarPravin Patel: “Performance Analysis of a Low-Power High Speed Hybrid 1-bit Full Adder Circuit,” MSc paper project, Winter 2018.
Cadence custom IC tools are/have been used in some research projects/graduate thesis including:
Carlos Christoffersen, Thinh Ngo, Ruiqi Song, Yushi Zhou, Samuel Pichardo, Laura Curiel, ``Quasi Class-DE Driving of HIFU Transducer Arrays,'' IEEE Transactions On Biomedical Circuits And Systems, Vol. 13, No. 1, 2019, pp. 214--224, DOI 10.1109/TBCAS.2018.2888990
Yushi Zhou, Jared Mercier and Fei Yuan, ``A Comparative Study Of Injection Locked Frequency Divider Using Harmonic Mixer In Weak And Strong Inversion,'' 2018 IEEE 61st Midwest Symp. on Circuits and Systems, pp. 97-100.
Carlos Christoffersen, Thinh Ngo, Ruiqi Song, Yushi Zhou, Samuel Pichardo, Laura Curiel, ``Suboptimal Class DE Operation for Ultrasound Transducer Arrays,’’ 2018 IEEE NEWCAS conference, Montreal, June 2018.
Anuj Sharma: “A Design Methodology For Low Power CMOS Current Source,” MSc Thesis, August 2016
P. Luong, C. Christoffersen, C. Rossi-Aicardi and C. Dualibe, ``Nanopower, Sub-1 V, CMOS Voltage References with Digitally-Trimmable Temperature Coefficient,'' Vol. 64, No. 4, pp. 787-798, IEEE Transactions On Circuits And Systems I: Regular Papers, DOI: 10.1109/TCSI.2016.2632072
R. Song, C. Christoffersen, Samuel Pichardo, Laura Curiel , ``An integrated full-bridge Class-DE ultrasound transducer driver for HIFU applications,'' Proceedings of the 2016 IEEE NEWCAS Conference, Vancouver, June 2016, pp. 1-4. DOI: 10.1109/NEWCAS.2016.7604776
C. Christoffersen, W. Wong, S. Pichardo, G. Togtema and L. Curiel, ``Class-DE Ultrasound Transducer Driver for HIFU Therapy,'' IEEE Transactions On Biomedical Circuits And Systems, Vol. 10, No. 2, April 2016, pp. 375-382. DOI 10.1109/TBCAS.2015.2406119
“Sub-1 V, 4 nA CMOS Voltage References with Digitally-Trimmable Temperature Coefficient”, MSc Thesis by Peter Luong (2014). (Custom IC)
P. Luong, C. Christoffersen, C. Rossi-Aicardi and C. Dualibe, ``Sub-1 V, 4 nA CMOS Voltage References with Digitally-Trimmable Temperature Coefficient,'' Proceedings of the 2014 IEEE NEWCAS Conference, Trois Rivieres, June 2014, pp. 345-348. DOI: 10.1109/NEWCAS.2014.6934053
“An Integrated Ultrasound Transducer Driver for HIFU Applications”, MSc Thesis by Wai Wong (2013). (Custom IC)
W. Wong, C. Christoffersen, Samuel Pichardo, Laura Curiel , ``An Integrated Ultrasound Transducer Driver For HIFU Applications,'' Proceedings of the 2013 IEEE Canadian Conference on Electrical and Computer Engineering, Regina, May 2013.
C. E. Christoffersen, G. Toombs and A. Manzak, ``An Ultra-Low Power CMOS PTAT Current Source,'' Proceeedings of the Argentine-Uruguay Conference on Micro-Nanoelectronics, Technology and Applications, October 7-8 2010, Montevideo, Uruguay, pp. 35-40. (Custom IC)
“A DVS-Capable Ultra-Low Power CMOS Temperature Sensor”, MSc Thesis by Greg Toombs (2009). (Custom IC)
“Analysis of Crosstalk in Digital Circuits”, by Dr. K. Natarayan (2008).
“Multi-Time Analysis of CMOS Circuits”, MSc Thesis by Justin Chen (2008). (Custom IC)
“Analysis of a CMOS VCO using Wave Digital Filters”, MSc Thesis by Weibo Li (2007).
This is not a "Cadence Homepage".
This page contains only Cadence-related information
Information is provided "as is" without warranty or guarantee of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise.
Please use this information at your own risk and any attempt to use this information is at your own risk we recommend using it on a copy of your data to be sure you understand what it does and under your conditions. Keep your master intact until you are personally satisfied with the user of this information within your environment.
Page maintained by: [Carlos Christoffersen]
Last updated : 9/5/2019
Cadence is a trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.