Instructor:

C. E. Christoffersen (carlos.christoffersen@lakeheadu.ca), Office: ATAC 5017, Tel.: 343-8352.

Class Web Site:

https://vision.lakeheadu.ca/eele5131/

Bibliography:

Class notes will be used. Main reference book: M. C. Schneider and C. Gallup-Montoro, “CMOS Analog Design Using All-Region MOSFET Modelling,” Cambridge University Press, 2010.

Topics

Note: The instructor reserves the right to modify the above outline depending on class progress.

Guidelines

Announcements:

Information related to class matters will be announced in class and posted on the web site.

Laboratory:

There will be laboratory sessions with tutorials on the use of Cadence tools, CMOS technology, components and layout techniques.

Assignments:

Problem sets will be posted in class and on the class web site. Assignment problems may require the use of Cadence tools and/or self-study.

Course Project:

Each student will be assigned a design project by the instructor. A written report with analysis and simulations of the design must be submitted. An oral presentation of the design and implementation will be given by each student sometime near the end of term.

Examinations

There will be a qualifying exam at the beginning of the course and a midterm exam. The purpose of the qualifying exam is to measure initial student background preparation and has no weight on the final mark. Dates and times will be announced in class. A three-hour final exam will be scheduled by the Registrar office.

Note: No communication devices are allowed during exams.

Marks distribution:

Qualifying exam 0%, Assignments 20%, Project 35%, max{Midterm, Final} 20%, Final 25%

Student Learner Outcomes

• Utilize an all-region MOSFET model for circuit analysis and design
• Use CMOS layout techniques to produce matched transistors
• Analyze and design CMOS circuit blocks
• Utilize CAE tools to design, verify and fine-tune CMOS integrated circuit blocks